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Phoenix PC/104-Plus Camera Link Frame Grabber

Part Number: AS-PHX-D24CL-PC104P32

  • Base Camera Link Configuration.
  • PC/104-Plus form factor.
  • 32 bit 33MHz PCI support in 3.3V & 5V signalling environments.
  • Maximum PCI burst rate of 133Mbytes/sec.
  • Supports digital areascan / linescan cameras.
  • Accepts multi-tap & multi-channel camera formats, including line and pixel interleaved.
  • Maximum pixel clock of 40MHz.
  • Extended temperature operation.
  • Software Development Kit (SDK) supports various operating systems for rapid integration.
  • v2.2 PCI and v1.1 Camera Link compliant.
  • Bus mastering hardware control of scatter-gather requires 0% host CPU intervention.
  • Serial port with EIA-644 signalling.
  • Supports Camera Link serial comms API.
  • Implements Data Valid (DVAL) for slow data rate cameras.
  • Opto-Isolated, TTL and RS-422 I/O.
  • Utilises software configurable FPGA technology for maximum flexibility.
  • RoHS compliant.

Phoenix-D24CL PC/104-Plus is a PCI board for the acquisition of digital data from a variety of Camera Link sources, including digital frame capture and line scan cameras. It supports all the formats of Base configuration, i.e. single 8 to 16 bit data, through 8 bit RGB, to dual tap 12 bit sources.

Phoenix-D24CL PC/104-Plus also supports various camera tap formats, such as line interlaced – adjacent lines are output simultaneously; line offset – lines are output from different parts of the CCD simultaneously; pixel interlaced – adjacent pixels on the same line are output simultaneously; and pixel offset – pixels are output from different parts of the same line simultaneously.

ROI and sub-sampling controls are used to increase application processing speed by only storing the required data. In addition the LUT functionality provides support for gamma correction, dynamic range cropping and binary thresholding in real time. The DataMapper further reduces the load on the host processor by mapping and packing the acquired data prior to transfer across the PCI bus. For example, the acquired data can be mapped into a suitable format and transferred directly to the graphics display, without the need for any host processing.
The PCI interface comprises intelligent scatter-gather hardware which reads its instructions direct from memory without any host CPU intervention. This in turn controls the DMA engine, which transfers the packed video data into any target memory which can be reached from the PCI bus. This can be system memory, graphics memory, or even other devices on the same or other PCI busses, such as DSP cards, etc.

The majority of the functionality is implemented in a single FPGA (Field Programmable Gate Array) providing a flexible solution for interfacing to Camera Link compliant sources. The FPGA implements the PCI interface, hardware scatter-gather control, PCI Initiator Burst Control (DMA), Acquisition Control, Region of Interest (ROI) and sub-sampling control, DataMapping functions, Datapath FIFOs, and Counter/Timer support. In addition the board contains Look Up Table (LUT) functionality, a Universal Asynchronous Receiver Transmitter (UART), 4 bit opto-isolated I/O, two 2 bit differential input ports and two 8 bit TTL I/O ports.

The Software Development Kit (SDK), available as a separate item, allows rapid system development and integration. It provides comprehensive example applications and optimized libraries, and is available for a variety of operating systems via a common API, including 32 bit Windows, Mac OS X, DOS, QNX and Linux. Drivers for third party applications are also available, e.g. Common Vision Blox, Image-Pro Plus, etc. As well as functions that control the hardware, the libraries include general purpose functions for the manipulation and display of images. A separate datasheet describes the SDK in detail.